Espressif Systems /ESP32-C6 /EXTMEM /L2_CACHE_ACS_CNT_INT_ST

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Interpret as L2_CACHE_ACS_CNT_INT_ST

Description

Cache Access Counter Interrupt status register

Fields

L2_IBUS0_OVF_INT_ST	The bit indicates the interrupt status of one of counters overflow that occurs in L2-Cache due to bus0 accesses L2-Cache.
L2_IBUS1_OVF_INT_ST	The bit indicates the interrupt status of one of counters overflow that occurs in L2-Cache due to bus1 accesses L2-Cache.
L2_IBUS2_OVF_INT_ST	Reserved
L2_IBUS3_OVF_INT_ST	Reserved
L2_DBUS0_OVF_INT_ST	The bit indicates the interrupt status of one of counters overflow that occurs in L2-Cache due to bus0 accesses L2-Cache.
L2_DBUS1_OVF_INT_ST	The bit indicates the interrupt status of one of counters overflow that occurs in L2-Cache due to bus1 accesses L2-Cache.
L2_DBUS2_OVF_INT_ST	Reserved
L2_DBUS3_OVF_INT_ST	Reserved

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